Years of experience and success in electroplating damascene copper have helped DuPont Electronics & Imaging bring leading-edge copper through silicon via (TSV) chemistries to the advanced packaging market. Our production-proven, three-component copper solutions enable even the most challenging TSV aspect ratios due to:
As TSVs become a mainstream interconnect technology used in memory stacking, CMOS image sensors, MEMS devices, and 2.5D interposer architectures, DuPont remains at the forefront, optimizing offerings to meet TSVs evolving needs.
Product Lines
Through silicon vias (TSVs) are vertical electrical interconnects formed using wafer etch processes and filled with either Cu or tungsten. First introduced in compound semiconductor applications, TSVs are also used in MEMS devices and CMOS image sensors, to create 3D memory stacks, and 2.5D interposer architectures, driven by high-performance computing needs.
Our Cu chemistries for TSV production are designed to meet requirements for leading edge TSVs with a 10:1 aspect ratio. This requires high purity, faster plating speeds without voids, gap-free bottom-up fill with minimal Cu overburden to reduce the need for chemical mechanical planarization processes.
DuPont delivers a full portfolio of packaging and assembly materials for the semiconductor industry. Click here to view a short video of our comprehensive offerings.
We love to talk about how our electronics solutions can build business, commercialize products,
and solve the challenges of our time.